1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device and a fabricating method thereof.
2. Discussion of the Related Art
Due to their small size, light weight, and low power consumption, flat panel display (FPD) devices have been the subject of much research in the field of information technology. Among the many types of FPD devices, liquid crystal display (LCD) devices having excellent color, resolution, and display characteristics are used in devices, such as notebook personal computers and desktop PCs. Generally, LCD devices include first and second electrode bearing substrates that are coupled to each other and spaced apart by a liquid crystal layer. LCD devices exploit optical anisotropy properties of the liquid crystal layer to display images. In particular, an electric field generated when a voltage is applied across the liquid crystal layer between an electrode of the first electrode bearing substrate and an electrode of the second electrode bearing substrate can selectively manipulate the light transmittance of the liquid crystal layer.
Among the various types of LCD devices, active matrix LCD (AM-LCD) devices are commonly used because of their high resolution and their superior ability to display moving images. In the AM-LCD device, pixel electrodes and a common electrode are formed on first and second substrates, respectively. The pixel electrodes each are respectively connected to a thin film transistor (TFT) and are disposed in a matrix. A vertical electric field generated between the pixel electrode and the common electrode drives the liquid crystal layer for the pixel in response to a data signal switched through the TFT. The AM-LCD device has excellent light transmittance and high aperture ratio in displaying moving images.
FIG. 1 is a schematic cross-sectional view of a related art liquid crystal display device. As shown in FIG. 1, an LCD device has a first region “A” where images are displayed and a second region “B” where pads (not shown) connected to a driving circuit (not shown) are disposed. The driving circuit applies signals to the first region “A.” In the first region “A,” a gate electrode 11 of a conductive material, such as a metal, is formed on a first substrate 10. A gate insulating layer 12 of silicon nitride (SiNx) or silicon oxide (SiOx) covers the gate electrode 11. An active layer 13 of amorphous silicon is formed on the gate insulating layer 12 over the gate electrode 11. An ohmic contact layer 14 of impurity-doped amorphous silicon is formed on the active layer 13. Source and drain electrodes 15a and 15b of a conductive material, such as a metal, are formed on the ohmic contact layer 14. The source electrode 15a, drain electrodes 15b and gate electrode 11 are for connecting a TFT “T.”
The gate electrode 11 and the source electrode 15a are connected to a gate line (not shown) and a data line (not shown), respectively. The gate line and the data line cross each other and pixel regions are defined between respective pairs of data lines and gate lines. A passivation layer 16 of silicon nitride (SiNx), silicon oxide (SiOx) or organic insulating material is formed on the source and drain electrodes 15a and 15b. The passivation layer 16 has a drain contact hole 16c exposing the drain electrode 15b. A pixel electrode 17 made of a transparent conductive material is formed on the passivation layer 16. The pixel electrode 17 is connected to the drain electrode 15b through the drain contact hole 16c. A first orientation film 18 is formed on the pixel electrode 17.
A second substrate 20 faces and is spaced apart from the first substrate 10. A black matrix 21 corresponding to the TFT “T” is formed on an inner surface of the second substrate 20. A color filter layer 22 is formed on the black matrix 21. The color filter layer 22 has red (R), green (G) and blue (B) colors that are alternately disposed. One color corresponds to one pixel region. A common electrode 23 mode of transparent conductive material is formed on the color filter layer 22. A second orientation film 24 is formed on the common electrode 23. A liquid crystal layer 30 is interposed between the first and second orientation films 18 and 24 that are made of an organic material including polyimide. The first and second orientation films 18 and 24 determine an initial alignment state of liquid crystal molecules.
The gate insulating layer 12, the passivation layer 16 and the first orientation film 18 extend into the second region “B” of the first substrate 10. The common electrode 23 and the second orientation film 24 extend into the second region “B” of the second substrate 20. Moreover, a seal pattern 40 is formed between the first and second orientation films 18 and 24 in the second region “B.” The seal pattern 40 maintains a gap between the first substrate 10 and the second substrate 20, and prevents leakage of the injected liquid crystal material from the LCD device.
Recently, an organic material with a low dielectric constant has been used as a passivation layer in LCD devices to increase the aperture ratio and/or the resolution of an LCD display. For example, photo-acryl is an organic material with a low dielectric constant that has been used. However, the polyimide used for the orientation films has poor adhesion to photo-acryl. Thus, the orientation films of polyimide curl up or peel away in the pad region of the LCD device where the seal pattern attaches to the orientation film to couple the substrates of the LCD device together. This inferiority will be illustrated in FIGS. 2 and 3 in detail.
FIG. 2 is a schematic plan view of a portion of an array substrate for a related art liquid crystal display device, and FIG. 3 is a schematic cross-sectional view taken along a line III-III′ of FIG. 2. FIG. 2 shows a portion of an array substrate where a gate line and a gate pad are disposed.
As shown in FIGS. 2 and 3, gate lines 51 of a conductive material, such as a metal, are formed on a substrate along a first direction. One end of each gate line 51 is connected to a shorting bar 53, as shown in FIG. 2. Each gate line 51 has a gate pad 52 for applying a signal. The shorting bar 53 is made of the same material as the gate line 51 and extends along a second direction substantially perpendicular to the first direction. A gate insulating layer 60 is formed on the gate lines 51. A passivation layer 70 of an organic material, such as photo-acryl, is formed on the gate insulating layer 60. The shorting bar 53 is formed below the passivation layer 70. A gate pad contact hole 71 exposing the gate pad 52 is formed in the passivation layer 70. A gate pad terminal 81 made of a transparent conductive material is formed on the passivation layer 70 and electrically connected to the gate pad 52 through the gate pad contact hole 71. The gate pad terminal 81 is simultaneously formed with a pixel electrode (not shown). An orientation film 90 made of polyimide is then formed on the gate pad terminal 81 and the passivation layer 70.
The adhesion between the passivation layer 70 and the orientation film 90 is poor. Thus, a defect resulting from the poor adhesion between the passivation layer 70 and the orientation film 90 will occur. More specifically, the orientation film 90 will curl up or peel away from the passivation layer, especially in the region of the LCD device where the seal pattern attaches to the orientation film to couple the substrates of the LCD device.